View CY7C194BN-15PC_1507932.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

cy7c194bn 256 kb (64 k 4) static ram cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document #: 001-06446 rev. *d revised june 2, 2011 256 kb (64 k 4) static ram features fast access time: 15 ns wide voltage range: 5.0 v 10% (4.5 v to 5.5 v) complementary metal oxide semiconductor (cmos) for optimum speed/power transistor transistor logic (ttl) compatible inputs and outputs cy7c194bn is available in 24-pin dip, 24-pin soj packages. general description the cy7c194bn is a high-performance cmos asynchronous sram organized as 64 k 4 bits that supports an asynchronous memory interface. the dev ice features an automatic power-down feature that significantly reduces power consumption when deselected. see the truth table in this data sheet for a complete description of read and write modes. the cy7c194bn is available in 24-pin dip, 24-pin soj package(s). row decoder ram array column decoder input buffer sense amps a x power down circuit i/ox oe we ce x (7c195 only) logic block diagram [+] feedback
cy7c194bn document #: 001-06446 rev. *d page 2 of 15 contents product portfolio .............................................................. 3 pin layout and specification .......................................... 4 pin description ................................................................. 5 cy7c194bn truth table .................................................. 5 maximum ratings ............................................................. 5 operating range ............................................................... 5 dc electrical characteristics .......................................... 6 capacitance ...................................................................... 6 thermal resistance .......................................................... 6 ac test loads .................................................................. 7 ac test conditions .......................................................... 7 ac electrical characteristics .......................................... 8 timing waveforms ........................................................... 8 ordering information ...................................................... 11 ordering code definitions ..... .................................... 11 package diagrams .......................................................... 12 acronyms ........................................................................ 13 document conventions ................................................. 13 units of measure ....................................................... 13 document history page ................................................. 14 sales, solutions, and legal information ...................... 15 worldwide sales and design s upport ......... .............. 15 products .................................................................... 15 psoc solutions ......................................................... 15 [+] feedback
cy7c194bn document #: 001-06446 rev. *d page 3 of 15 product portfolio description -15 unit maximum access time 15 ns maximum operating current 80 ma maximum cmos standby current 10 ma [+] feedback
cy7c194bn document #: 001-06446 rev. *d page 4 of 15 pin layout and specification a 6 a 7 a 8 a 9 a 10 a 11 a 12 a 13 a 14 a 15 ce gnd we i/o 0 i/o 1 i/o 2 i/o 3 a 0 a 1 a 2 a 3 a 4 a 5 v cc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 cy7c194bn 24-pin soj (8 15 3.5 mm) a 6 a 7 a 8 a 9 a 10 a 11 a 12 a 13 a 14 a 15 ce gnd we i/o 0 i/o 1 i/o 2 i/o 3 a 0 a 1 a 2 a 3 a 4 a 5 v cc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 cy7c194bn 24-pin dip (6.6 31.8 3.5 mm) [+] feedback
cy7c194bn document #: 001-06446 rev. *d page 5 of 15 pin description pin type description cy7c194bn 24-pin dip 24-pin soj a x input address inputs 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 18, 19, 20, 21, 22, 23 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 18, 19, 20, 21, 22, 23 ce control chip enable 11 11 i/o x input or output data input/outputs 14, 15, 16, 17 14, 15, 16, 17 nc ? no connect. pins are not internally connected to the die ? ? v cc supply power (v) 24 24 we control write enable 13 13 cy7c194bn truth table ce we i/ox mode power h x high z power-down standby (i sb ) l h data out read active (i cc ) l l data in write active (i cc ) maximum ratings above which the useful life may be impa ired. for user guidelines, not tested. parameter description value unit t stg storage temperature ?65 to +150 c t amb ambient temperature with power applied (i.e. case temperature) ?55 to +125 c v cc core supply voltage relative to v ss ?0.5 to +7.0 v v in , v out dc voltage applied to any pin relative to v ss ?0.5 to v cc + 0.5 v i out output short-circuit current 20 ma v esd static discharge voltage (p er mil-std-883, method 3015) > 2001 v i lu latch-up current > 200 ma operating range range ambient temperature (t a ) voltage range (v cc ) commercial 0 c to 70 c 5.0 v 10% [+] feedback
cy7c194bn document #: 001-06446 rev. *d page 6 of 15 dc electrical characteristics parameter [1] description condition 15 ns unit min max v ih input high voltage 2.2 v cc + 0.3 v v il input low voltage ?0.3 0.8 v v oh output high voltage v cc = min, l oh = ?4.0 ma 2.4 ? v v ol output low voltage v cc = min, l ol = 8.0 ma ? 0.4 v i cc v cc operating supply current v cc = max, i out = 0 ma, f = f max = 1 / t rc ? 80 ma i sb1 automatic ce power-down current ? ttl inputs v cc = max, ce ? v ih , v in ? v ih or v in ? v il , f = f max ? 30 ma i sb2 automatic ce power-down current ? cmos inputs v cc = max, ce ? v cc ? 0.3 v, v in > v cc ? 0.3 v or v in ? 0.3 v, f = 0, commercial ? 10 ma i oz output leakage current gnd ? v i ? v cc , output disabled ?5 +5 ? a i ix input load current gnd ? v i ? v cc ?5 +5 ? a capacitance parameter [2] description conditions max unit c in input capacitance t a = 25 c, f = 1 mhz, v cc = 5.0 v 7 pf c out output capacitance 10 ? thermal resistance parameter [2, 3] description conditions cy7c194bn unit 24-pin dip 24-pin soj ? ja thermal resistance (junction to ambient) still air, soldered on a 3 x 4.5 square inches, two-layer printed circuit board 75.69 84.15 c/w ? jc thermal resistance (junction to case) 33.80 37.56 notes 1. v il (min) = ?2.0 v for pulse durations of less than 20 ns. 2. tested initially and after any design or pr ocess change that may affect these parameters 3. test conditions assume a transition time of 3 ns or less, timing reference levels of 1.5 v, input pulse levels of 0 to 3.0 v. [+] feedback
cy7c194bn document #: 001-06446 rev. *d page 7 of 15 ac test loads v cc v ss rise time 1 v/ns fall time 1 v/ns all input pulses 90% 10% 90% 10% v output r1 r2 c1 cc v output r3 c2 cc r4 output loads output loads for t hzoe ,t hzce &t hzwe * including scope and jig capacitance (b)* (a)* r th t v thevenin equivalent for ac test conditions parameter description nom unit c1 capacitor 1 30 pf c2 capacitor 2 5 r1 resistor 1 480 ? r2 resistor 2 255 r3 resistor 3 480 r4 resistor 4 255 r th resistor thevenin 167 v th voltage thevenin 1.73 v [+] feedback
cy7c194bn document #: 001-06446 rev. *d page 8 of 15 ac electrical characteristics parameter [4, 5, 6, 7] description 15 ns unit min max t rc read cycle time 15 ? ns t aa address to data valid ? 15 ns t oha data hold from address change 3 ? ns t ace ce to data valid ? 15 ns t lzce ce to low z 3 ? ns t hzce ce to high z ? 7 ns t pu ce to power-up 0 ? ns t pd ce to power-down ? 15 ns t wc write cycle time 15 ? ns t sce ce to write end 10 ? ns t aw address set-up to write end 10 ? ns t ha address hold from write end 0 ? ns t sa address set-up to write start 0 ? ns t pwe we pulse width 9 ? ns t sd data set-up to write end 8 ? ns t hd data hold from write end 0 ? ns t hzwe we low to high z ? 7 ns t lzwe we high to low z 3 ? ns timing waveforms figure 1. read cycle no. 1 [8, 9] address data out previous data valid data valid t rc t aa t oha notes 4. tested initially and after any design or proc ess change that may affect these parameters 5. at any given temperature and voltage condition, t hzce is less than t lzce , and t hzwe is less than t lzwe for any given device. 6. the internal write time of the memory is defined by the overlap of ce low and we low. ce and we must be low to initiate a write, and the transition of any of these signals can terminate the write. the input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write. 7. t hzce , t hzwe are specified as in part (b) of the a/c test loads. transitions are measured 200 mv from steady state voltage. 8. device is continuously selected. ce = v il . 9. we is high for read cycle. [+] feedback
cy7c194bn document #: 001-06446 rev. *d page 9 of 15 figure 2. read cycle no. 2 [10, 11, 12] figure 3. write cycle no. 1 (we controlled) [10, 13] timing waveforms (continued) address ce oe data out data valid t rc high z t ace t hzce t hzoe t doe t lzoe t lzce v cc current i cc i sb t pu 50% 50% t pd high z address ce we data in/out t wc data-in valid t sce t sa t aw t pwe t ha t hd t sd t hzwe t lzwe undefined see footnotes undefined see footnote s notes 10. tested initially and after any design or process change that may affect these parameters 11. we is high in read cycle. 12. address valid prior to or coincident with ce transition low. 13. the minimum write cycle time is the sum of t hzwe and t sd . [+] feedback
cy7c194bn document #: 001-06446 rev. *d page 10 of 15 figure 4. write cycle no. 2 (ce controlled) [14, 15] timing waveforms (continued) address ce we data in/out t wc data-in valid t sce t sa t aw t ha t hd t sd high z high z notes 14. this cycle is ce controlled. 15. if ce goes high simultaneously with we going high, the output remains in a high-impedance state. [+] feedback
cy7c194bn document #: 001-06446 rev. *d page 11 of 15 ordering information speed (ns) ordering code package diagram package type power option operating range 15 CY7C194BN-15PC 51-85013 24-pin dip (6.6 31.8 3.5 mm) standard commercial cy7c194bn-15vc 51-85030 24-pin soj (8 15 3.5 mm) standard commercial please contact local sales representative regarding availability of these parts. ordering code definitions temperature range: c = commercial package type: x = p or v p = 24-pin dip v = 24-pin soj speed: 15 ns bn = 0.25 m technology 94 = 256 k bit density with datawidth 4bits 1 = fast asynchronous sram family technology code: c = cmos 7 = sram cy = cypress c cy 1 - 15 x 7 94 c bn [+] feedback
cy7c194bn document #: 001-06446 rev. *d page 12 of 15 package diagrams figure 5. 24-pin (300-mil) soj v 24.3/vz24.3 (molded soj v13), 51-85030 figure 6. 24-pin pdip (1.260 0.270 0.140 inches) p24.3, 51-85013 51-85030 *c 51-85013 *c [+] feedback
cy7c194bn document #: 001-06446 rev. *d page 13 of 15 acronyms document conventions units of measure acronym description ce chip enable cmos complementary metal oxide semiconductor dip dual in-line package esd electrostatic discharge i/o input/output soj small outline j-lead sram static random access memory ttl transistor-transistor logic we write enable symbol unit of measure c degree celsius mhz mega hertz ? a micro amperes ma milli amperes mm milli meter ns nano seconds ? ohms % percent pf pico farad v volts w watts [+] feedback
cy7c194bn document #: 001-06446 rev. *d page 14 of 15 document history page document title: cy7c194bn, 256 kb (64 k 4) static ram document number: 001-06446 rev. ecn no. issue date orig. of change description of change ** 424111 see ecn nxr new data sheet *a 2892510 03/18/2010 vkn removed 25ns speed bin updated ordering information table updated package diagram added sales, solutions, and legal information *b 3108898 12/13/2010 aju added ordering code definitions . *c 3219087 04/18/2011 pras updated as per template added toc added acronyms and units of measure . *d 3271782 06/02/2011 pras updated general description (removed ?for best practice recommendations, refer to the cypress application note an1064, sram system guidelines.?). updated in new template. [+] feedback
document #: 001-06446 rev. *d revised june 2, 2011 page 15 of 15 all products and company names mentioned in this document may be the trademarks of their respective holders. cy7c194bn ? cypress semiconductor corporation, 2006-2011. the information contained herein is subject to change without notice. cypress s emiconductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress product. nor does it convey or imply any license under patent or other rights. cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement wi th cypress. furthermore, cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. the inclusion of cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies cypress against all charges. any source code (software and/or firmware) is owned by cypress semiconductor corporation (cypress) and is protected by and subj ect to worldwide patent protection (united states and foreign), united states copyright laws and internatio nal treaty provisions. cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the cypress source code and derivative works for the sole purpose of creating custom software and or firmware in su pport of licensee product to be used only in conjunction with a cypress integrated circuit as specified in the applicable agreement. any reproduction, modification, translation, compilation, or repre sentation of this source code except as specified above is prohibited without the express written permission of cypress. disclaimer: cypress makes no warranty of any kind, express or implied, with regard to this material, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose. cypress reserves the right to make changes without further notice to t he materials described herein. cypress does not assume any liability arising out of the application or use of any product or circuit described herein. cypress does not authori ze its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. the inclusion of cypress? prod uct in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies cypress against all charges. use may be limited by and subject to the applicable cypress software license agreement. sales, solutions, and legal information worldwide sales and design support cypress maintains a worldwide network of offices, solution center s, manufacturer?s representatives, and distributors. to find t he office closest to you, visit us at cypress locations . products automotive cypress.co m/go/automotive clocks & buffers cypress.com/go/clocks interface cypress. com/go/interface lighting & power control cypress.com/go/powerpsoc cypress.com/go/plc memory cypress.com/go/memory optical & image sensing cypress.com/go/image psoc cypress.com/go/psoc touch sensing cyp ress.com/go/touch usb controllers cypress.com/go/usb wireless/rf cypress.com/go/wireless psoc solutions psoc.cypress.com/solutions psoc 1 | psoc 3 | psoc 5 [+] feedback

▲Up To Search▲

Price & Availability of CY7C194BN-15PC

	To Download CY7C194BN-15PC Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .